Automated solutions for custom IP design,
proven to reduce layout time by 3x to 20x

Migration of analog, mixed-signal and memory IP to different process technologies

  • Next technology node
  • Multi foundry sourcing
  • Automated PDK and design rules changes
  • Implementing recommended DFM rules
  • Silicon proven down to 28nm
  • Supporting Pcells and Cadence Virtuoso

Sagantec's solutions enable semiconductor companies to leverage their investment in existing physical design IP and accomplish dramatic savings in the implementation of custom, analog, mixed-signal and memory circuits in advanced process technologies.

Recent Customer Success Stories

nmigrate™ proven and commercially adopted for 14nm libraries
 
NanGate integrates Sagantec’s nmigrate™ engine in its library solutions for 20nm and 14nm
 
Vanguard International Semiconductor adopts Sagantec migration solution
 
Sagantec announces a new migration and DRC correction tool for 28nm and 20nm
 
Sagantec acquires NP-Komplete Technologies
 
High Speed Serdes Migration to 40nm (SemiWiki.com)
 
Adjusting design to process rule changes (SemiWiki.com)
 
Process migration to 28nm (SemiWiki.com)
Design Automation Conference
June 2-6, 2013
Austin, TX
Click here for our latest information (password required)
 

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2075 De La Cruz Blvd, Suite #105, Santa Clara, California 95050
Telephone: 1.408.727.6290
Email: info@sagantec.com