With the growth of electronic communications, consumer markets and high speed circuits and systems, analog circuits have become an integral and critical part of SoC in various market segments. There is an ever growing need to be able to integrate manifold analog components on chips in latest technologies, and do so within tight schedule constraints. Designing and retargeting analog circuits is an extremely laborious manual task performed by highly skilled, experienced and hard to come by individuals. Our solutions provide a significant acceleration and productivity increase both for physical design of new circuits using Companion and for physical migration of existing analog circuits to new technologies using SiClone.

• Automatic recognition and scaling of transistors, capacitors and resistors.
• Automatic symmetry recognition and maintenance.
• Hierarchy preservation
• Preserve matching constructs
• Constraint entry in Cadence Virtuoso when using Companion.
• Automatic reading of constraints from dfII properties/text labels.
• Migration concepts: gluing, gravitation of objects, alignment of objects.
  Keep-out areas