Automated solutions for custom IP design,
proven to reduce layout time by 3x to 20x
Migration of analog, mixed-signal and memory IP to different process technologies
- Next technology node
- Multi foundry sourcing
- Automated PDK and design rules changes
- Implementing recommended DFM rules
- Silicon proven down to 28nm
- Supporting Pcells and Cadence Virtuoso
Sagantec's solutions enable semiconductor companies to leverage their investment in existing physical design IP and accomplish dramatic savings in the implementation of custom, analog, mixed-signal and memory circuits in advanced process technologies.
Recent Customer Success Stories
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