Sagantec - Physical Design Retargeting

Custom cores and physical blocks can be migrated quickly using SiClone. The key to successful production of complex designs within a very short design cycle is the reuse of high value IP blocks and cores in a new process technology.

Full-memory instances can be migrated in one shot by SiClone producing a new library of memory cells, as well as a complete migrated instance. No manual preparation or hierarchy correction is needed for SiClone; all hierarchical styles are accepted as is. The memory core cell can be migrated or all peripherals can be made to fit to a new handcrafted core cell.	Using Anaconda and SiClone, analog blocks can be migrated very quickly into new process technologies. SiClone will preserve the physical design integrity, maintaining elements relative positions, hierarchy and symmetry. Transistors, resistors and capacitors are automatically recognized and can be resized to match their required electrical values.

Large cores and logic blocks up to 1M transistors can be migrated quickly using SiClone. The performance (timing/power) can be controlled by SiClone's individual device sizing capability. Crosstalk can be reduced by net specific wire sizing and spacing. Optimal compaction with SiClone typically reduces the area of the migrated results by 20% to 30% compared to linear shrink. Custom sub-blocks such as datapaths can be migrated hierarchically using SiClone.